VPN width as GPIO

transfer efficiency by implementing dual one-way data buses to reduce datacongestion and arbitration with dedicated DMA arrays, namely the C/WDMA(config/write direct memory access) and RDMA (read direct memory access),implemented to establish two separate one-way data paths to transfer pending databetween the internal/external memories and the cryptographic engines under theguidance of the descriptors. The CD is the most important control module in chargeof the heterogeneous resource allocation and the task management given in thedescriptors. In addition to descriptor generation, C*Core 310 also manages systemwork flows and executes various network security related applications. This systemadopts a PCI-X compliant interface with a 133 MHz 64 bit data width as GPIO. Theapplication command is delivered by the external NP which processes the input andoutput packets to and from the PHY modules and executes data compression,header modification, packet classification and packet framing